This invention relates to field emission devices and in particular to methods of manufacturing addressable field electron emission cathodes. Preferred embodiments of the present invention aim to provide low manufacturing cost methods of fabricating multi-electrode control and focusing structures.
It has become clear to those skilled in the art that the keys to practical field emission devices, particularly displays, are arrangements that permit the control of the emitted current with low voltages. The majority of the art in this field relates to tip-based emittersxe2x80x94that is, structures that utilise atomically sharp micro-tips as the field emitting source.
There is considerable prior art relating to tip-based emitters. The main objective of workers in the art has been to place an electrode with an aperture (the gate) less than 1 xcexcm away from each single emitting tip, so that the required high fields can by achieved using applied potentials of 100V or lessxe2x80x94these emitters are termed gated arrays. The first practical realisation of this was described by C A Spindt, working at Stanford Research Institute in California (J.Appl.Phys. 39, 7, pp3504-3505, (1968)). Spindt""s arrays used molybdenum emitting tips which were produced, using a self masking technique, by vacuum evaporation of metal into cylindrical depressions in a SiO2 layer on a Si substrate. Many variants and improvements on the basic Spindt technology are described in the scientific and patent literature.
An alternative important approach is the creation of gated arrays using silicon micro-engineering. Field electron emission displays utilising this technology are being manufactured at the present time, with interest by many organisations world-wide. Again many variants have been described.
A major problem with all tip-based emitting systems is their vulnerability to damage by ion bombardment, ohmic heating at high currents and the catastrophic damage produced by electrical breakdown in the device. Making large area devices is both difficult and costly. Furthermore, in order to get low control voltages, the basic emitting element, consisting of a tip and its associated gate aperture, must be approximately one xcexcm (one micron) or less in diameter. The creation of such structures requires semiconductor-type fabrication technology with its high associated cost structure. Moreover, when large areas are required, expensive and slow step and repeat equipment must be used.
In about 1985, it was discovered that thin films of diamond could be grown on heated substrates from a hydrogen-methane atmosphere, to provide broad area field emitters.
In 1988 S Bajic and R V Latham, (Journal of Physics D Applied Physics, vol. 21 200-204 (1988)), described a low-cost composite that created a high density of metal-insulator-metal-insulator-vacuum (MIMIV) emitting sites. The composite had conducting particles dispersed in an epoxy resin. The coating was applied to the surface by standard spin coating techniques.
Much later (1995) Tuck, Taylor and Latham (GB 2304989) improved the above MIMV emitter by replacing the epoxy resin with an inorganic insulator that both improved stability and enabled it to be operated in sealed off vacuum devices.
The best examples of such broad-area emitters can produce usable electric currents at fields less than 10 Vxcexcmxe2x88x921. In the context of this specification, a broad-area field emitter is any material that by virtue of its composition, micro-structure, work function or other property emits useable electronic currents at macroscopic electrical fields that might be reasonably generated at a planar or near-planar surfacexe2x80x94that is, without the use of atomically sharp micro-tips as emitting sites.
Electron optical analysis shows that the feature size required to control a broad-area emitter is nearly an order of magnitude larger than for a tip-based system. Zhu et al (U.S. Pat. No. 5,283,501) describes such structures with diamond-based emitters. Moyer (U.S. Pat. No. 5,473,218) claims an electron optical improvement in which a conducting layer sits upon the broad-area emitter to both prevent emission into the gate insulator and focus electrons through the gate aperture. The concept of such structures was not new and is electronoptically equivalent to arrangements that had been used in thermionic devices for many decades. For example Winsor (U.S. Pat. No. 3,500,110) described a shadow grid at cathode potential to prevent unwanted electrons intercepting a grid set at a potential positive with respect to the cathode. Somewhat later Miram (U.S. Pat. No. 4,096,406) improved upon this to produce a bonded grid structure in which the shadow grid and control grid are separated by a solid insulator and placed in contact with the cathode. Moyer""s arrangement simply replaced the thermionic cathode in Miram""s structure with an equivalent broad-area field emitter. However, such structures are useful, with the major challenge being methods of constructing them at low cost and over large areas. It is in this area that preferred embodiments of the present invention make a contribution to the art.
In Hoole A C F et al xe2x80x9cDirectly patterned low voltage planar tungsten lateral field emission structuresxe2x80x9d, Journal of Vacuum Science and Technology: Part B, Vol 11, No. 6, 1 Nov. 1993, Pages 2574-2578, XP000423379, there is disclosed a combination of low-resolution and high-resolution exposure steps. This is to overcome a problem with a high resolution device having an insufficiently small field of view. No attention or teaching is given as to the low cost fabrication of field emission cathodes having gate electrodes formed over cathode electrodes.
EP 0 795 622 A1 discloses a method for forming a field emission device. This involves vacuum deposition and is concerned with controlled ion bombardment of a precursor of a multi-phase material to form layers of different properties. It does not address the matter of forming field emission devices at low cost, and in particular, provides no teaching as to how desired accuracy of alignment can be achieved at low cost. Amongst many other things, it shows a fairly typical field emitter arrangement in which a structure that may be regarded as a gate electrode, comprising an insulating layer and a conducting layer, is disposed over a structure that may be regarded as a cathode electrode, comprising a field emitting layer between two conducting layers.
Preferred embodiments of the present invention aim to provide cost-effective field emitting structures and devices that utilise broad-area emitters. The emitter structures may be used in devices that include: field electron emission display panels; high power pulse devices such as electron MASERS and gyrotrons; crossed-field microwave tubes such as CFAs; linear beam tubes such as klystrons; flash x-ray tubes; triggered spark gaps and related devices; broad area x-ray sources for sterilisation; vacuum gauges; ion thrusters for space vehicles; particle accelerators; lamps; ozonisers; and plasma reactors.
According to one aspect of the present invention, there is provided a method of manufacturing a field electron emission cathode having at least one cathode electrode which comprises a field emitting layer between first and second conducting layers, and at least one gate electrode which overlies said cathode electrode and comprises an insulating layer and a third conducting layer, wherein said method comprises the steps of:
a. depositing on an insulating substrate to form by low resolution means, a sequence of said first conducting layer, field emitting layer and second conducting layer to form said cathode electrode;
b. depositing on said cathode electrode to form by low resolution means, a sequence of said insulating layer and third conducting layer, to form said gate electrode;
c. coating the structure thus formed with a photoresist layer;
d. exposing said photoresist layer by high resolution means to form at least one group of emitting cells, the or each said group being located in an area of overlap between one said cathode electrode and one said gate electrode;
e. etching sequentially said third conducting layer, said insulating layer and said second conducting layer to expose said field emitting layer in said cells; and
f. removing remaining areas of said photoresist layer.
Preferably, said cathode is a cathode array, said cathode electrode and said gate electrode comprise respectively cathode addressing tracks and gate addressing tracks, which tracks are arranged in addressable rows and columns, and step d. includes forming a pattern of said groups of emitting cells.
Preferably, at least one of or all of said cathode addressing tracks address(es) a plurality of rows or columns of cells.
Each row and/or column can be thin or wide, to take in as few or as many cells as desired, depending upon the application of the cathode.
Preferably, said steps of exposing and etching include the formation of fiducial marks on the cathode array, to facilitate the subsequent alignment of the array with an anode or other component after manufacture of the array.
A method as above may comprise the step of forming at least one of said conducting layers by application of a liquid bright metal or by electroless plating.
A method as above may comprise the step of forming at least one of said conducting layers by a means other than vacuum evaporation or sputtering.
Preferably, said field emitting layer comprises a layer of broad area field emitter material.
A method as above may comprise the further steps of depositing sequentially a second insulating layer and fourth conducting layer onto the cathode after completion of steps a. to f., to form a focus grid.
The invention extends to a field electron emission cathode which has been manufactured by a method according to any of the preceding aspects of the invention.
According to another aspect of the present invention, there is provided a field emission device comprising an anode having electroluminescent phosphors and a cathode as above, wherein the cathode is a cathode array as above and is arranged to bombard said phosphors.
Preferably, said phosphors are arranged in groups of red, green and blue to form a colour display.
A field emission device as above may include anode driving means for energising said red, green and blue groups in turn.
A field emission device as above may further comprise an electrode of interdigitate or mesh form which is interposed between said phosphors and is arranged to be driven at a potential less than that at which said phosphors are driven, thereby to form potential wells around the phosphors in order to attract electrons towards said phosphors and compensate for any misalignment between cathode and anode.
The cathode may be provided with a further control grid over said gate electrode, and a driving means for so driving said control grid as to retard electrons emitted by the cathode.
Such a field emission device may further comprise means for providing a magnetic field normal to the emitter surface.
The first conducting layer, field emitting layer and second conducting layer may be patterned using low resolution means, as a whole or on a layer by layer basis. The same applies to the insulating layer and third conducting layer. The high resolution exposure step is preferably the only high resolution step required in the whole manufacturing method, and is such that the tolerance on location of the groups, with respect to intersections of the cathode and gate electrodes, is determined by the relatively large cathode and gate electrode dimensions (e.g. as tracks in rows and columns) rather than the much smaller emitter cell dimension. A first etch for the conducting layers is preferably chosen such that it does not attack the insulating or field emitting layers. A second etch for the insulating layers is preferably chosen such that it does not attack the conducting layers. Thus, the etching can be being carried out in sequential steps using the first and second etches alternately, such that each layer after etching forms a mask for the next layer to be etched, thereby providing self-alignment of the apertures in the layers.
In the context of this specification, the meaning of xe2x80x9clow resolution meansxe2x80x9d and xe2x80x9chigh resolution meansxe2x80x9d is as follows. The high resolution means is a means capable of forming well-defined structures of the chosen emitter cell size. The low resolution means is a means capable of forming well-defined structures of the chosen size of cathode and gate electrodes but not of the smaller, chosen emitter cell size.
For example, the high resolution means may be a means capable of forming well-defined structures of a minimum size which is equal to or smaller than 50%, 40%, 30%, 20%, 10% or 5% of the minimum size of well-defined structure that can be formed by the low resolution means. The low resolution means may be a lithographic means that can form well-defined structures down to a minimum dimension of 100, 70, 50, 40 or 30 xcexcm. The high resolution means may be a photo-etching means that can form well-defined structures down to a minimum dimension of 20 or 10 xcexcm or less, and preferably down to a few xcexcm across or less. As one example, cathode and gate tracks 100 xcexcm across are formed by lithography means, and emitter cells 8 xcexcm across are formed by photo-etching means.